This application claims the priority of Japanese Application Serial, No. 324809/1991, filed Dec. 9, 1991, the subject matter of which is incorporated herein by reference. This application also claims an invention a part of which is disclosed in the copending application Serial No. 07/519,572, filed May 7, 1990, (now Pat. No. 5,113,088 issued May 12, 1992) which is a continuation-in-part of application Serial No. 07/433,213, filed Nov. 7, 1989 now abandoned. The above copending application which is commonly assigned by this applicant claims the priority of Japanese Application Serial No. 283,448/1998, filed Nov. 9, 1988.
The present invention relates to a feedback controlled substrate bias generator suitable for use in a semiconductor memory circuit, and more specifically to a feedback controlled substrate bias generator comprising a feedback controller having a circuit for sensing a bias level of a semiconductor substrate, a charge pump circuit and an improved oscillator.
A feedback controlled substrate bias generator has been disclosed in U.S. Pat. Nos. 4,142,114, 4,439,692, 4,471,290 and 4,794,278, for example. The disclosed substrate bias generator comprises an oscillator for generating a clock signal, a charge pump circuit electrically connected to the oscillator, for generating a bias voltage level to be applied to a semi-conductor substrate, and a sensing circuit for detecting the bias voltage level applied to the semiconductor substrate and for controlling either the oscillator or the charge pump circuit based on the sensed bias voltage level.
The output terminal of the sensing circuit is electrically connected to a first input terminal of an inhibition gate such as a NOR gate or a NAND gate. A second input terminal of the inhibition gate is electrically connected with the output terminal of the oscillator. The output terminal of the inhibition gate is electrically connected to the charge pump or the oscillator so as to inhibit a clock signal from being input to the charge pump circuit or stop the operation of the oscillator.
The oscillator is however operated even if the clock signal is inhibited from being input to the charge pump circuit. Therefore, the current used up by the oscillator increases. When the oscillator is restarted after having been inactivated, an initial condition set to the oscillator provides unstable oscillations. There was thus a possibility of a substrate voltage remaining inconstant.
It is an object of the present invention to provide a feedback controlled substrate bias generator which can provide less current consumption.
It is another object of the present invention to provide a feedback controlled substrate bias generator which can provide a stable substrate voltage.
A feedback control led substrate bias generator according to the present invention has a substrate bias level sensing circuit, a charge pump circuit and an improved oscillator. The substrate bias level sensing circuit is coupled to a semiconductor substrate for sensing a bias voltage of the semicnductor substrate and outputting a control signal in response to the sensed bias voltage. The charge pump circuit is coupled to the semiconductor substrate and the substrate bias level sensing circuit for receiving a clock pulse and the control signal and supplying the bias voltage to the semiconductor substrate in response to the received signals. The improved oscillator is coupled to the charge pump circuit for generating the clock pulse. The improved oscillator has a loop circuit having a plurality of serially and circularly coupled inverters each of which has a source terminal applied to a voltage from a voltage source, an input terminal for receiving an input signal and an output terminal for outputting an output signal. The improved oscillator further has a plurality of switches each of which has a control terminal, a first terminal coupled to the source terminal of a corresponding inverter of the loop circuit and a second terminal coupled to the voltage source. Each of the switches electrically cuts the first and second terminals when the input signal of the one of the inverters except for the corresponding inverter changes from one level to another.